This invention relates generally to analog to digital converters, and relates in particular to delta-sigma analog to digital converters.
Analog to digital converters are employed for converting analog signals to digital signals in a wide variety of applications, including instrumentation and communication such as modem and wireless communication. Conventional analog to digital converters generally include Nyquist rate converters and over-sampled converters. Nyquist rate converters typically are designed to provide a certain output rate and to provide a single conversion operation per output sample. Over-sampled converters typically over-sample a given analog input signal. One type of over-sampled converter is a delta-sigma converter, such as disclosed in U.S. Pat. No. 6,414,615.
Many communications systems, however, are designed to be able to handle communication operations in two or more operational modes (such as GSM, WCDMA and TD-SCDMA etc. for wireless communication system). It is typically desirable that the same hardware be able to be used for each of the desired operational modes. Analog to digital converters, however, are typically either designed to support one mode of operation only, requiring duplication of the analog to digital function in the hardware, or include duplicative hardware. For example, while TD-SCDMA and WCDMA are both air interfaces for third generation (3G) terminals, TD-SCDMA downlink requires 2.56 Msps (2.56 million samples per second) analog to digital conversion with relatively high signal to noise ratio, while WCDMA requires 7.68 Msps analog to digital conversion with relatively low signal to noise ratio.
The difference between the two standards relates, in part, to the bandwidth of the signal and the performance of the analog to digital converter. WCDMA (wideband code division multiple access) uses a signal that has an occupied bandwidth of 5 MHz RF or 2.5 MHz baseband. TD-SCDMA (time division-synchronous code division multiple access) has an occupied bandwidth of 1.6 MHz as RF signal or 800 kHz used as a baseband signal. To support WCDMA, therefore, one needs a converter with a higher speed. For TD-SCDMA one needs 8 to 10 bits performance. The tradeoff, therefore, is that WCDMA requires a faster converter with fewer bits, while TD-SCDMA permits a slower converter with more bits. The problem, therefore, is how to have a converter that can be configured in two ways and be reasonably efficient for both jobs. Although one solution is to design a fast converter that gives 8 to 10 bits performance, but this would be inefficient and more costly and require more silicon area.
Another conventional dual-mode modulator is disclosed by T. Burger and Q. Huang in A 13.5-mW 185-Msample/s ΔΣ Modulator for UMTS/GSM Dual-Standard IF Reception, IEEE Journal of Solid-State Circuits, vol. 36, No. 12 (December 2001). A system disclosed therein provides that a resonator is disabled by disabling a feedback path from a third integrator to a second integrator. All integrators and feed-forward paths, however, remain active, and applicants have found that when a high frequency resonator feedback path is disabled and all integrators and feed-forward paths remain active, a delta-sigma modulator may not be sufficiently stable.
There is a need, therefore, for an analog to digital converter system that is efficient and economical to manufacture, yet supports two modes of operation.